Datasheet

Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C
This register provides a master control of the polarity of the PWM signals on the device pins. The
PWM signals generated by the PWM generator are active High; they can optionally be made active
Low via this register. Disabled PWM channels are also passed through the output inverter (if so
configured) so that inactive channels maintain the correct polarity.
PWM Output Inversion (PWMINVERT)
Base 0x4002.8000
Offset 0x00C
Type R/W, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
PWM0InvPWM1InvPWM2InvPWM3InvPWM4InvPWM5Invreserved
R/WR/WR/WR/WR/WR/WROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:6
Invert PWM5 Signal
When set, the generated PWM5 signal is inverted.
0R/WPWM5Inv5
Invert PWM4 Signal
When set, the generated PWM4 signal is inverted.
0R/WPWM4Inv4
Invert PWM3 Signal
When set, the generated PWM3 signal is inverted.
0R/WPWM3Inv3
Invert PWM2 Signal
When set, the generated PWM2 signal is inverted.
0R/WPWM2Inv2
Invert PWM1 Signal
When set, the generated PWM1 signal is inverted.
0R/WPWM1Inv1
Invert PWM0 Signal
When set, the generated PWM0 signal is inverted.
0R/WPWM0Inv0
June 18, 2012672
Texas Instruments-Production Data
Pulse Width Modulator (PWM)
NRND: Not recommended for new designs.