Datasheet

Register 3: PWM Output Enable (PWMENABLE), offset 0x008
This register provides a master control of which generated PWM signals are output to device pins.
By disabling a PWM output, the generation process can continue (for example, when the time bases
are synchronized) without driving PWM signals to the pins. When bits in this register are set, the
corresponding PWM signal is passed through to the output stage, which is controlled by the
PWMINVERT register. When bits are not set, the PWM signal is replaced by a zero value which is
also passed to the output stage.
PWM Output Enable (PWMENABLE)
Base 0x4002.8000
Offset 0x008
Type R/W, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
PWM0EnPWM1EnPWM2EnPWM3EnPWM4EnPWM5Enreserved
R/WR/WR/WR/WR/WR/WROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:6
PWM5 Output Enable
When set, allows the generated PWM5 signal to be passed to the device
pin.
0R/WPWM5En5
PWM4 Output Enable
When set, allows the generated PWM4 signal to be passed to the device
pin.
0R/WPWM4En4
PWM3 Output Enable
When set, allows the generated PWM3 signal to be passed to the device
pin.
0R/WPWM3En3
PWM2 Output Enable
When set, allows the generated PWM2 signal to be passed to the device
pin.
0R/WPWM2En2
PWM1 Output Enable
When set, allows the generated PWM1 signal to be passed to the device
pin.
0R/WPWM1En1
PWM0 Output Enable
When set, allows the generated PWM0 signal to be passed to the device
pin.
0R/WPWM0En0
671June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.