Datasheet

Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004
This register provides a method to perform synchronization of the counters in the PWM generation
blocks. Writing a bit in this register to 1 causes the specified counter to reset back to 0; writing
multiple bits resets multiple counters simultaneously. The bits auto-clear after the reset has occurred;
reading them back as zero indicates that the synchronization has completed.
PWM Time Base Sync (PWMSYNC)
Base 0x4002.8000
Offset 0x004
Type R/W, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
Sync0Sync1Sync2reserved
R/WR/WR/WROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:3
Reset Generator 2 Counter
Performs a reset of the PWM generator 2 counter.
0R/WSync22
Reset Generator 1 Counter
Performs a reset of the PWM generator 1 counter.
0R/WSync11
Reset Generator 0 Counter
Performs a reset of the PWM generator 0 counter.
0R/WSync00
June 18, 2012670
Texas Instruments-Production Data
Pulse Width Modulator (PWM)
NRND: Not recommended for new designs.