Datasheet

Table 18-3. PWM Register Map (continued)
See
page
DescriptionResetTypeNameOffset
695PWM1 Dead-Band Control0x0000.0000R/WPWM1DBCTL0x0A8
696PWM1 Dead-Band Rising-Edge Delay0x0000.0000R/WPWM1DBRISE0x0AC
697PWM1 Dead-Band Falling-Edge-Delay0x0000.0000R/WPWM1DBFALL0x0B0
678PWM2 Control0x0000.0000R/WPWM2CTL0x0C0
680PWM2 Interrupt and Trigger Enable0x0000.0000R/WPWM2INTEN0x0C4
683PWM2 Raw Interrupt Status0x0000.0000ROPWM2RIS0x0C8
684PWM2 Interrupt Status and Clear0x0000.0000R/W1CPWM2ISC0x0CC
685PWM2 Load0x0000.0000R/WPWM2LOAD0x0D0
686PWM2 Counter0x0000.0000ROPWM2COUNT0x0D4
687PWM2 Compare A0x0000.0000R/WPWM2CMPA0x0D8
688PWM2 Compare B0x0000.0000R/WPWM2CMPB0x0DC
689PWM2 Generator A Control0x0000.0000R/WPWM2GENA0x0E0
692PWM2 Generator B Control0x0000.0000R/WPWM2GENB0x0E4
695PWM2 Dead-Band Control0x0000.0000R/WPWM2DBCTL0x0E8
696PWM2 Dead-Band Rising-Edge Delay0x0000.0000R/WPWM2DBRISE0x0EC
697PWM2 Dead-Band Falling-Edge-Delay0x0000.0000R/WPWM2DBFALL0x0F0
18.6 Register Descriptions
The remainder of this section lists and describes the PWM registers, in numerical order by address
offset.
June 18, 2012668
Texas Instruments-Production Data
Pulse Width Modulator (PWM)
NRND: Not recommended for new designs.