Datasheet

Register 23: Ethernet PHY Management Register 16 – Vendor-Specific (MR16),
address 0x10
This register enables software to configure the operation of vendor-specific modes of the Ethernet
Controller.
Ethernet PHY Management Register 16 – Vendor-Specific (MR16)
Base 0x4004.8000
Address 0x10
Type R/W, reset 0x0140
0123456789101112131415
RXCCPCSBPreservedRVSPOLAPOLreservedNL10SQEITXHIM
reserved
INPOLRPTR
R/WR/WROROR/WR/WROROROROR/WR/WR/WROR/W0R/WType
0000001010000000Reset
DescriptionResetTypeNameBit/Field
Repeater Mode
When set, this bit enables the repeater mode of operation. In this mode,
full-duplex is not allowed and the Carrier Sense signal only responds
to receive activity.
0R/WRPTR15
Interrupt Polarity
DescriptionValue
Sets the polarity of the PHY interrupt to be active High.1
Sets the polarity of the PHY interrupt to active Low.0
Important:
Because the Media Access Controller expects active
Low interrupts from the PHY, this bit must always be
written with a 0 to ensure proper operation.
0R/W0INPOL14
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved13
Transmit High Impedance Mode
When set, this bit enables the transmitter High Impedance mode. In this
mode, the TXOP and TXON transmitter pins are put into a high impedance
state. The RXIP and RXIN pins remain fully functional.
0R/WTXHIM12
SQE Inhibit Testing
When set, this bit prohibits 10BASE-T SQE testing.
When clear, the SQE testing is performed by generating a collision pulse
following the completion of the transmission of a frame.
0R/WSQEI11
Natural Loopback Mode
When set, this bit enables the 10BASE-T Natural Loopback mode. In
this mode, the transmission data received by the Ethernet Controller is
looped back onto the receive data path when 10BASE-T mode is
enabled.
0R/WNL1010
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x5ROreserved9:6
639June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.