Datasheet

Table 14-4. Inter-Integrated Circuit (I
2
C) Interface Register Map (continued)
See
page
DescriptionResetTypeNameOffset
I
2
C Slave
543I2C Slave Own Address0x0000.0000R/WI2CSOAR0x800
544I2C Slave Control/Status0x0000.0000ROI2CSCSR0x804
546I2C Slave Data0x0000.0000R/WI2CSDR0x808
547I2C Slave Interrupt Mask0x0000.0000R/WI2CSIMR0x80C
548I2C Slave Raw Interrupt Status0x0000.0000ROI2CSRIS0x810
549I2C Slave Masked Interrupt Status0x0000.0000ROI2CSMIS0x814
550I2C Slave Interrupt Clear0x0000.0000WOI2CSICR0x818
14.6 Register Descriptions (I
2
C Master)
The remainder of this section lists and describes the I
2
C master registers, in numerical order by
address offset. See also “Register Descriptions (I
2
C Slave)” on page 542.
529June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.