Datasheet

TPR = (System Clock / (2 * (SCL_LP + SCL_HP) * SCL_CLK)) - 1;
TPR = (20MHz / (2 * (6 + 4) * 100000)) - 1;
TPR = 9
Write the I2CMTPR register with the value of 0x0000.0009.
6. Specify the slave address of the master and that the next operation will be a Send by writing
the I2CMSA register with a value of 0x0000.0076. This sets the slave address to 0x3B.
7. Place data (byte) to be sent in the data register by writing the I2CMDR register with the desired
data.
8. Initiate a single byte send of the data from Master to Slave by writing the I2CMCS register with
a value of 0x0000.0007 (STOP, START, RUN).
9. Wait until the transmission completes by polling the I2CMCS register’s BUSBSY bit until it has
been cleared.
14.5 Register Map
Table 14-4 on page 528 lists the I
2
C registers. All addresses given are relative to the I
2
C base
addresses for the master and slave:
I
2
C 0: 0x4002.0000
Note that the I
2
C module clock must be enabled before the registers can be programmed (see
page 223). There must be a delay of 3 system clocks after the I
2
C module clock is enabled before
any I
2
C module registers are accessed.
The hw_i2c.h file in the StellarisWare
®
Driver Library uses a base address of 0x800 for the I
2
C slave
registers. Be aware when using registers with offsets between 0x800 and 0x818 that StellarisWare
uses an offset between 0x000 and 0x018 with the slave base address.
Table 14-4. Inter-Integrated Circuit (I
2
C) Interface Register Map
See
page
DescriptionResetTypeNameOffset
I
2
C Master
530I2C Master Slave Address0x0000.0000R/WI2CMSA0x000
531I2C Master Control/Status0x0000.0000R/WI2CMCS0x004
535I2C Master Data0x0000.0000R/WI2CMDR0x008
536I2C Master Timer Period0x0000.0001R/WI2CMTPR0x00C
537I2C Master Interrupt Mask0x0000.0000R/WI2CMIMR0x010
538I2C Master Raw Interrupt Status0x0000.0000ROI2CMRIS0x014
539I2C Master Masked Interrupt Status0x0000.0000ROI2CMMIS0x018
540I2C Master Interrupt Clear0x0000.0000WOI2CMICR0x01C
541I2C Master Configuration0x0000.0000R/WI2CMCR0x020
June 18, 2012528
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface
NRND: Not recommended for new designs.