Datasheet

14 Inter-Integrated Circuit (I
2
C) Interface
The Inter-Integrated Circuit (I
2
C) bus provides bi-directional data transfer through a two-wire design
(a serial data line SDA and a serial clock line SCL), and interfaces to external I
2
C devices such as
serial memory (RAMs and ROMs), networking devices, LCDs, tone generators, and so on. The I
2
C
bus may also be used for system testing and diagnostic purposes in product development and
manufacture. The LM3S8962 microcontroller includes one I
2
C module, providing the ability to interact
(both send and receive) with other I
2
C devices on the bus.
The Stellaris
®
I
2
C interface has the following features:
■ Devices on the I
2
C bus can be designated as either a master or a slave
– Supports both sending and receiving data as either a master or a slave
– Supports simultaneous master and slave operation
■ Four I
2
C modes
– Master transmit
– Master receive
– Slave transmit
– Slave receive
■ Two transmission speeds: Standard (100 Kbps) and Fast (400 Kbps)
■ Master and slave interrupt generation
– Master generates interrupts when a transmit or receive operation completes (or aborts due
to an error)
– Slave generates interrupts when data has been sent or requested by a master
■ Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing
mode
June 18, 2012514
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface
NRND: Not recommended for new designs.