Datasheet
Figure 1-1. Stellaris LM3S8962 Microcontroller High-Level Block Diagram
ARM®
Cortex™-M3
(50MHz)
NVIC MPU
Flash
(256KB)
DCodebus
ICodebus
JTAG/SWD
System
Controland
Clocks
(w/ Precis. Osc.)
Bus Matrix
System Bus
SRAM
(64KB)
SYSTEM PERIPHERALS
Watchdog
Timer
(1)
Hibernation
Module
General-
Purpose
Timer (4)
GPIOs
(5-42)
SERIAL PERIPHERALS
UART
(2)
I2C
(1)
SSI
(1)
Ethernet
MAC/PHY
CAN
Controller
(1)
ANALOG PERIPHERALS
10- BitADC
Channels
(4)
Analog
Comparator
(1)
MOTION CONTROL PERIPHERALS
QEI
(2)
PWM
(6)
Advanced Peripheral Bus (APB)
LM3S8962
June 18, 201248
Texas Instruments-Production Data
Architectural Overview
NRND: Not recommended for new designs.