Datasheet

12.1 Block Diagram
Figure 12-1. UART Module Block Diagram
TxFIFO
16 x 8
.
.
.
RxFIFO
16 x 8
.
.
.
Identification
Registers
UARTPCellID0
UARTPCellID1
UARTPCellID2
UARTPCellID3
UARTPeriphID0
UARTPeriphID1
UARTPeriphID2
UARTPeriphID3
UARTPeriphID4
UARTPeriphID5
UARTPeriphID6
UARTPeriphID7
Interrupt Control
UARTDR
Control/Status
Transmitter
(with SIR
Transmit
Encoder)
Baud Rate
Generator
Receiver
(with SIR
Receive
Decoder)
UnTx
UnRx
System Clock
Interrupt
UARTIFLS
UARTIM
UARTMIS
UARTRIS
UARTICR
UARTIBRD
UARTFBRD
UARTRSR/ECR
UARTFR
UARTLCRH
UARTCTL
UARTILPR
12.2 Signal Description
Table 12-1 on page 435 and Table 12-2 on page 436 list the external signals of the UART module
and describe the function of each. The UART signals are alternate functions for some GPIO signals
and default to be GPIO signals at reset, with the exception of the U0Rx and U0Tx pins which default
to the UART function. The column in the table below titled "Pin Assignment" lists the possible GPIO
pin placements for these UART signals. The AFSEL bit in the GPIO Alternate Function Select
(GPIOAFSEL) register (page 311) should be set to choose the UART function. For more information
on configuring GPIOs, see “General-Purpose Input/Outputs (GPIOs)” on page 289.
Table 12-1. UART Signals (100LQFP)
DescriptionBuffer Type
a
Pin TypePin NumberPin Name
UART module 0 receive. When in IrDA mode, this signal has
IrDA modulation.
TTLI26U0Rx
UART module 0 transmit. When in IrDA mode, this signal has
IrDA modulation.
TTLO27U0Tx
UART module 1 receive. When in IrDA mode, this signal has
IrDA modulation.
TTLI12U1Rx
435June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.