Datasheet

Register 6: ADC Event Multiplexer Select (ADCEMUX), offset 0x014
The ADCEMUX selects the event (trigger) that initiates sampling for each sample sequencer. Each
sample sequencer can be configured with a unique trigger source.
ADC Event Multiplexer Select (ADCEMUX)
Base 0x4003.8000
Offset 0x014
Type R/W, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
EM0EM1EM2EM3
R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved31:16
SS3 Trigger Select
This field selects the trigger source for Sample Sequencer 3.
The valid configurations for this field are:
EventValue
Controller (default)0x0
Analog Comparator 00x1
Reserved0x2
Reserved0x3
External (GPIO PB4)0x4
Timer
In addition, the trigger must be enabled with the TnOTE bit in
the GPTMCTL register (see page 354).
0x5
PWM0
The PWM module 0 trigger can be configured with the PWM0
Interrupt and Trigger Enable (PWM0INTEN) register, see
page 680.
0x6
PWM1
The PWM module 1 trigger can be configured with the
PWM1INTEN register, see page 680.
0x7
PWM2
The PWM module 2 trigger can be configured with the
PWM2INTEN register, see page 680.
0x8
reserved0x9-0xE
Always (continuously sample)0xF
0x0R/WEM315:12
June 18, 2012412
Texas Instruments-Production Data
Analog-to-Digital Converter (ADC)
NRND: Not recommended for new designs.