Datasheet

DescriptionResetTypeNameBit/Field
GPTM TimerA Mode
The TAMR values are defined as follows:
DescriptionValue
Reserved0x0
One-Shot Timer mode0x1
Periodic Timer mode0x2
Capture mode0x3
The Timer mode is based on the timer configuration defined by bits 2:0
in the GPTMCFG register (16-or 32-bit).
In 16-bit timer configuration, TAMR controls the 16-bit timer modes for
TimerA.
In 32-bit timer configuration, this register controls the mode and the
contents of GPTMTBMR are ignored.
0x0R/WTAMR1:0
351June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.