Datasheet

Table of Contents
Revision History ............................................................................................................................. 27
About This Document .................................................................................................................... 34
Audience .............................................................................................................................................. 34
About This Manual ................................................................................................................................ 34
Related Documents ............................................................................................................................... 34
Documentation Conventions .................................................................................................................. 35
1 Architectural Overview .......................................................................................... 37
1.1 Product Features .......................................................................................................... 37
1.2 Target Applications ........................................................................................................ 46
1.3 High-Level Block Diagram ............................................................................................. 47
1.4 Functional Overview ...................................................................................................... 49
1.4.1 ARM Cortex™-M3 ......................................................................................................... 49
1.4.2 Motor Control Peripherals .............................................................................................. 50
1.4.3 Analog Peripherals ........................................................................................................ 51
1.4.4 Serial Communications Peripherals ................................................................................ 51
1.4.5 System Peripherals ....................................................................................................... 53
1.4.6 Memory Peripherals ...................................................................................................... 54
1.4.7 Additional Features ....................................................................................................... 54
1.4.8 Hardware Details .......................................................................................................... 55
2 The Cortex-M3 Processor ...................................................................................... 56
2.1 Block Diagram .............................................................................................................. 57
2.2 Overview ...................................................................................................................... 58
2.2.1 System-Level Interface .................................................................................................. 58
2.2.2 Integrated Configurable Debug ...................................................................................... 58
2.2.3 Trace Port Interface Unit (TPIU) ..................................................................................... 59
2.2.4 Cortex-M3 System Component Details ........................................................................... 59
2.3 Programming Model ...................................................................................................... 60
2.3.1 Processor Mode and Privilege Levels for Software Execution ........................................... 60
2.3.2 Stacks .......................................................................................................................... 60
2.3.3 Register Map ................................................................................................................ 61
2.3.4 Register Descriptions .................................................................................................... 62
2.3.5 Exceptions and Interrupts .............................................................................................. 75
2.3.6 Data Types ................................................................................................................... 75
2.4 Memory Model .............................................................................................................. 75
2.4.1 Memory Regions, Types and Attributes ........................................................................... 77
2.4.2 Memory System Ordering of Memory Accesses .............................................................. 77
2.4.3 Behavior of Memory Accesses ....................................................................................... 77
2.4.4 Software Ordering of Memory Accesses ......................................................................... 78
2.4.5 Bit-Banding ................................................................................................................... 79
2.4.6 Data Storage ................................................................................................................ 81
2.4.7 Synchronization Primitives ............................................................................................. 82
2.5 Exception Model ........................................................................................................... 83
2.5.1 Exception States ........................................................................................................... 84
2.5.2 Exception Types ............................................................................................................ 84
2.5.3 Exception Handlers ....................................................................................................... 87
3June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.