Datasheet

Register 10: User Debug (USER_DBG), offset 0x1D0
Note: Offset is relative to System Control base address of 0x400FE000.
This register provides a write-once mechanism to disable external debugger access to the device
in addition to 27 additional bits of user-defined data. The DBG0 bit (bit 0) is set to 0 from the factory
and the DBG1 bit (bit 1) is set to 1, which enables external debuggers. Changing the DBG1 bit to
0 disables any external debugger access to the device permanently, starting with the next power-up
cycle of the device. The NW bit (bit 31) indicates that the register has not yet been committed and
is controlled through hardware to ensure that the register is only committed once. Prior to being
committed, bits can only be changed from 1 to 0. The reset value shown only applies to power-on
reset; any other type of reset does not affect this register. Once committed, this register cannot be
restored to the factory default value.
User Debug (USER_DBG)
Base 0x400F.E000
Offset 0x1D0
Type R/W, reset 0xFFFF.FFFE
16171819202122232425262728293031
DATANW
R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WType
1111111111111111Reset
0123456789101112131415
DBG0DBG1DATA
R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WType
0111111111111111Reset
DescriptionResetTypeNameBit/Field
User Debug Not Written
When set, this bit indicates that this 32-bit register has not been
committed. When clear, this bit specifies that this register has been
committed and may not be committed again.
1R/WNW31
User Data
Contains the user data value. This field is initialized to all 1s and can
only be committed once.
0x1FFFFFFFR/WDATA30:2
Debug Control 1
The DBG1 bit must be 1 and DBG0 must be 0 for debug to be available.
1R/WDBG11
Debug Control 0
The DBG1 bit must be 1 and DBG0 must be 0 for debug to be available.
0R/WDBG00
June 18, 2012280
Texas Instruments-Production Data
Internal Memory
NRND: Not recommended for new designs.