Datasheet

Register 3: Hibernation RTC Match 1 (HIBRTCM1), offset 0x008
This register is the 32-bit match 1 register for the RTC counter.
Hibernation RTC Match 1 (HIBRTCM1)
Base 0x400F.C000
Offset 0x008
Type R/W, reset 0xFFFF.FFFF
16171819202122232425262728293031
RTCM1
R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WType
1111111111111111Reset
0123456789101112131415
RTCM1
R/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WR/WType
1111111111111111Reset
DescriptionResetTypeNameBit/Field
RTC Match 1
A write loads the value into the RTC match register.
A read returns the current match value.
0xFFFF.FFFFR/WRTCM131:0
253June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.