Datasheet

Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 670
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 671
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 672
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 673
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ........................................................... 674
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ........................................................ 675
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ................................................ 676
Register 9: PWM Status (PWMSTATUS), offset 0x020 ...................................................................... 677
Register 10: PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 678
Register 11: PWM1 Control (PWM1CTL), offset 0x080 ....................................................................... 678
Register 12: PWM2 Control (PWM2CTL), offset 0x0C0 ...................................................................... 678
Register 13: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 .................................... 680
Register 14: PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 .................................... 680
Register 15: PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 .................................... 680
Register 16: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .................................................... 683
Register 17: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .................................................... 683
Register 18: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 ................................................... 683
Register 19: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 684
Register 20: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ........................................... 684
Register 21: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ........................................... 684
Register 22: PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 685
Register 23: PWM1 Load (PWM1LOAD), offset 0x090 ....................................................................... 685
Register 24: PWM2 Load (PWM2LOAD), offset 0x0D0 ....................................................................... 685
Register 25: PWM0 Counter (PWM0COUNT), offset 0x054 ................................................................ 686
Register 26: PWM1 Counter (PWM1COUNT), offset 0x094 ................................................................ 686
Register 27: PWM2 Counter (PWM2COUNT), offset 0x0D4 ............................................................... 686
Register 28: PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................. 687
Register 29: PWM1 Compare A (PWM1CMPA), offset 0x098 ............................................................. 687
Register 30: PWM2 Compare A (PWM2CMPA), offset 0x0D8 ............................................................. 687
Register 31: PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................. 688
Register 32: PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................. 688
Register 33: PWM2 Compare B (PWM2CMPB), offset 0x0DC ............................................................ 688
Register 34: PWM0 Generator A Control (PWM0GENA), offset 0x060 ................................................ 689
Register 35: PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ................................................ 689
Register 36: PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ................................................ 689
Register 37: PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................ 692
Register 38: PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ................................................ 692
Register 39: PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ................................................ 692
Register 40: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................ 695
Register 41: PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ................................................. 695
Register 42: PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ................................................ 695
Register 43: PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C ............................. 696
Register 44: PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC ............................. 696
Register 45: PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC ............................. 696
Register 46: PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................. 697
Register 47: PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ............................. 697
Register 48: PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 ............................. 697
25June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.