Datasheet

Table 5-7. System Control Register Map (continued)
See
page
DescriptionResetTypeNameOffset
221Deep Sleep Mode Clock Gating Control Register 00x00000040R/WDCGC00x120
229Deep Sleep Mode Clock Gating Control Register 10x00000000R/WDCGC10x124
236Deep Sleep Mode Clock Gating Control Register 20x00000000R/WDCGC20x128
205Deep Sleep Clock Configuration0x0780.0000R/WDSLPCLKCFG0x144
5.5 Register Descriptions
All addresses given are relative to the System Control base address of 0x400F.E000.
189June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.