Datasheet

DescriptionResetTypeNameBit/Field
Interrupt Priority for Interrupt [4n+3]
This field holds a priority value, 0-7, for the interrupt with the number
[4n+3], where n is the number of the Interrupt Priority register (n=0 for
PRI0, and so on). The lower the value, the greater the priority of the
corresponding interrupt.
0x0R/WINTD31:29
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved28:24
Interrupt Priority for Interrupt [4n+2]
This field holds a priority value, 0-7, for the interrupt with the number
[4n+2], where n is the number of the Interrupt Priority register (n=0 for
PRI0, and so on). The lower the value, the greater the priority of the
corresponding interrupt.
0x0R/WINTC23:21
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved20:16
Interrupt Priority for Interrupt [4n+1]
This field holds a priority value, 0-7, for the interrupt with the number
[4n+1], where n is the number of the Interrupt Priority register (n=0 for
PRI0, and so on). The lower the value, the greater the priority of the
corresponding interrupt.
0x0R/WINTB15:13
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved12:8
Interrupt Priority for Interrupt [4n]
This field holds a priority value, 0-7, for the interrupt with the number
[4n], where n is the number of the Interrupt Priority register (n=0 for
PRI0, and so on). The lower the value, the greater the priority of the
corresponding interrupt.
0x0R/WINTA7:5
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0ROreserved4:0
June 18, 2012124
Texas Instruments-Production Data
Cortex-M3 Peripherals
NRND: Not recommended for new designs.