Datasheet

LM3914
www.ti.com SNVS761B –JANUARY 2000–REVISED MARCH 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1)(2)
Power Dissipation
(3)
PDIP (NFK) 1365 mW
Supply Voltage 25V
Voltage on Output Drivers 25V
Input Signal Overvoltage
(4)
±35V
Divider Voltage −100 mV to V
+
Reference Load Current 10 mA
Storage Temperature Range −55°C to +150°C
Soldering Information
PDIP Package
Soldering (10 seconds) 260°C
PLCC Package
Vapor Phase (60 seconds) 215°C
Infrared (15 seconds) 220°C
See http://www.ti.com for other methods of soldering surface mount devices.
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) The maximum junction temperature of the LM3914 is 100°C. Devices must be derated for operation at elevated temperatures. Junction
to ambient thermal resistance is 55°C/W for the PDIP (NFK package).
(4) Pin 5 input current must be limited to ±3mA. The addition of a 39k resistor in series with pin 5 allows ±100V signals without damage.
ELECTRICAL CHARACTERISTICS
(1)(2)
Parameter Conditions
(1)
Min Typ Max Units
COMPARATOR
Offset Voltage, Buffer and First 0V ≤ V
RLO
= V
RHI
≤ 12V,
3 10 mV
Comparator I
LED
= 1 mA
Offset Voltage, Buffer and Any Other 0V ≤ V
RLO
= V
RHI
≤ 12V,
3 15 mV
Comparator I
LED
= 1 mA
Gain (ΔI
LED
/ΔV
IN
) I
L(REF)
= 2 mA, I
LED
= 10 mA 3 8 mA/mV
Input Bias Current (at Pin 5) 0V ≤ V
IN
≤ V
+
− 1.5V 25 100 nA
Input Signal Overvoltage No Change in Display −35 35 V
VOLTAGE-DIVIDER
Divider Resistance Total, Pin 6 to 4 8 12 17 kΩ
Accuracy
(3)
0.5 2 %
(1) Unless otherwise stated, all specifications apply with the following conditions:
3 V
DC
≤ V
+
≤ 20 V
DC
V
REF
, V
RHI
, V
RLO
≤ (V
+
− 1.5V)
3 V
DC
≤ V
LED
≤ V
+
0V ≤ V
IN
≤ V
+
− 1.5V
−0.015V ≤ V
RLO
≤ 12V
DC
T
A
= +25°C, I
L(REF)
= 0.2 mA, V
LED
= 3.0V, pin 9 connected to pin 3 (Bar Mode).
−0.015V ≤ V
RHI
≤ 12 V
DC
For higher power dissipations, pulse testing is used.
(2) Pin 5 input current must be limited to ±3mA. The addition of a 39k resistor in series with pin 5 allows ±100V signals without damage.
(3) Accuracy is measured referred to +10.000V
DC
at pin 6, with 0.000 V
DC
at pin 4. At lower full-scale voltages, buffer and comparator offset
voltage may add significant error.
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