Datasheet

EN
T
enable delay
0V
1.22V
T
enable_delay
=
1.22V x C
EN
7 PA
7 PA
Enable
C
EN
EN
+
-
1.22V
LM3881
www.ti.com SNVS555C –JANUARY 2008–REVISED APRIL 2013
ENABLE CIRCUIT
The enable circuit is designed with an internal comparator, referenced to a bandgap voltage (1.22V), to provide a
precision threshold. This allows the timing to be set externally using a capacitor as shown in the diagram below.
Alternatively, sequencing can be based on a certain event such as a line voltage reaching 90% of its nominal
value by employing a resistor divider from VCC to Enable.
Figure 14. Precision Enable Circuit
Using the internal pull-up current source to charge the external capacitor C
EN
, the time delay while the enable
voltage reaches the required threshold, assuming EN is charging from 0V, can be calculated by the equation as
follows.
Figure 15. Enable Delay Timing
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