Datasheet

LM3881
SNVS555C –JANUARY 2008–REVISED APRIL 2013 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
VCC, EN, INV, TADJ, FLAG1, FLAG2, FLAG3 to GND -0.3V to +6.0V
Storage Temperature Range -65°C to +150°C
Junction Temperature 150°C
Lead Temperature (Soldering, 5 sec.) 260°C
Minimum ESD Rating
(3)
2 kV
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and conditions,
see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Operating Ratings
(1)
VCC to GND 2.7V to 5.5V
EN, INV, TADJ, FLAG1, FLAG2, FLAG3 to GND -0.3V to VCC + 0.3V
Junction Temperature -40°C to +125°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and conditions,
see the Electrical Characteristics.
Electrical Characteristics
Specifications with standard typeface are for T
J
= 25°C, and those in bold face type apply over the full Operating Temperature
Range (T
J
= -40°C to +125°C). Minimum and Maximum limits are ensured through test, design or statistical correlation.
Typical values represent the most likely parametric norm at T
J
= 25°C and are provided for reference purposes only. V
CC
=
3.3V, unless otherwise specified.
Symbol Parameter Conditions Min
(1)
Typ
(2)
Max
(1)
Unit
I
Q
Operating Quiescent Current 80 110 µA
Open Drain Flags
I
FLAG
FLAGx Leakage Current V
FLAGx
= 3.3V 0.001 1 µA
V
OL
FLAGx Output Voltage Low I
FLAGx
= 1.2 mA 0.4 V
Time Delays
I
TADJ_SRC
TADJ Source Current 4 12 20 µA
I
TADJ_SNK
TADJ Sink Current 4 12 20 µA
V
HTH
High Threshold Level 1.0 1.22 1.4 V
V
LTH
Low Threshold Level 0.3 0.5 0.7 V
T
CLK
Clock Cycle C
ADJ
= 10 nF 1.2 ms
T
D1
, T
D4
Flag Time Delay 9 10 Clock
Cycles
T
D2
, T
D3
, T
D5
, T
D6
Flag Time Delay 8 Clock
Cycles
ENABLE Pin
V
EN
EN Pin Threshold 1.0 1.22 1.5 V
I
EN
EN Pin Pull-up Current V
EN
= 0V 7 µA
INV Pin
V
IH_INV
Invert Pin V
IH
90% VCC V
V
IL_INV
Invert Pin V
IL
10% V
VCC
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical
Quality Control (SQC) methods. The limits are used to calculate TI's Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely parametric norm.
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