Datasheet

GND
VCC
FLAG1
FLAG2
FLAG3
Sequence
Control
EN
Timing
Delay
Generation
Master
Clock
EPROM
(Factory Set)
+
-
1.25V
t
d1
t
d2
t
d3
t
d4
t
d5
t
d6
7 PA
LM3880, LM3880Q-1
www.ti.com SNVS451I –AUGUST 2006–REVISED MARCH 2013
Block Diagram
Figure 10. Block Diagram
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