Datasheet

LM3722, LM3723, LM3724
www.ti.com SNVS154E –MAY 2001–REVISED MARCH 2013
Timing Diagram
Figure 12. Timing Diagram
Circuit Information
RESET OUTPUT
The reset input of a µP initializes the device into a known state. The LM3722/LM3723/LM3724 microprocessor
voltage monitoring circuits assert a forced reset output to prevent code execution errors during power-up, power-
down, and brownout conditions.
RESET is guaranteed valid for V
CC
≥ 1V. Once V
CC
exceeds the reset threshold, an internal timer maintains the
output for the reset timeout period. After this interval, reset goes high and the microprocessor initializes itself into
a known state. The LM3722 and LM3724 offer an active-low RESET; the LM3723 offers an active-high RESET.
As V
CC
drops below the reset threshold (such as during a brownout), the reset activates (see the NEGATIVE-
GOING V
CC
TRANSIENTS section). When V
CC
again rises above the reset threshold, the internal timer starts.
Reset holds until V
CC
exceeds the reset threshold for longer than the reset timeout period. After this time, reset
releases.
Additionally, the Manual Reset input (MR) will initiate a forced reset. See the MANUAL RESET INPUT (MR)
section.
The LM3722/LM3723/LM3724 reset outputs ignore short duration glitches on V
CC
and MR. See the Applications
Information section for details.
RESET THRESHOLD
The LM3722/LM3723/LM3724 are available with reset voltages of 4.63V, 3.08V, and 2.32V which are suitable for
monitoring 5.0V, 3.3V, and 2.5V supplies respectively. Other reset thresholds in the 2.20V to 5.0V range, in 10
mV steps, are available; contact Texas Instruments for details.
Copyright © 2001–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: LM3722 LM3723 LM3724