Datasheet

t
HIGH
t
DELAY
t
LOW
t
RISE
t
FALL
I
HIGH
I
LOW
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Each low voltage control bank has its own pattern generator control. Bank C has Pattern Generator 1,
Bank D has Pattern Generator 2, Bank E has Pattern Generator 3, and Bank F has Pattern Generator 4.
Each pattern generator has registers that control the pulse high time, pulse low time, pulse rise time, pulse
fall time, pulse delay from when the pattern is enabled, and the pulse low brightness. The pulse high
brightness is the same as the high brightness register for the particular Control Bank.
Figure 11. Pattern Generator Timing
Table 21. Low Time(s) (0x71, 0x81, 0x91, 0xA1)
Bit [7:0]
t
LOW
times
0x00 = 16.384ms (16.384ms/step) (Default)
0x01 = 32.768ms
:
0x3B = 983.05ms
0x3C = 999.424ms
0x3D = 1130.496ms (131.072ms/step)
0x3E = 1261.568ms
:
0x7F = 9781.248ms
0x80 = 10.305536s (524.288ms/step)
:
0xFF = 76.890112s
Table 22. High Time(s) (0x72, 0x82, 0x92, 0xA2)
Bit [6:0]
t
HIGH
times
0x00 = 16.384ms (16.384ms/step) (Default)
0x01 = 32.768ms
:
0x3B = 983.05ms
0x3C = 999.424ms
0x3D = 1130.496ms (131.072ms/step)
0x3E = 1261.568ms
:
0x7F = 9781.248ms
15
SLOA172B–June 2012–Revised April 2013 AN-2250 LM3533 Evaluation Kit
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