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LM3533 Graphical User Interface

7.2 Bank A/B Control Tab

The Bank A/B Control Tab (Figure 9) contains all the register options that are unique to the High Voltage

Control Banks (A and B). Table 11 through Table 15 describe these registers.

Figure 9. Bank A/B Control Tab

Table 11. Bank A or Bank B PWM Configuration (0x14, 0x15)

Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Zone 4 PWM Zone 3 PWM Zone 2 PWM Zone 1 PWM Zone 0 PWM Enabled PWM Enabled

Enabled Enabled Enabled Enabled

0 = PWM input is 0 = PWM input is 0 = PWM input is 0 = PWM input is 0 = PWM input is 0 = PWM Input is

disabled in Zone 4 disabled in Zone 3 disabled in Zone 2 disabled in Zone 1 disabled in Zone 0 disabled (Default)

(Default) (Default)

1 = PWM input is 1 = PWM input is 1 = PWM input is 1 = PWM input is 1 = PWM input is 1 = PWM Input is

enabled in Zone 4 enabled in Zone 3 enabled in Zone 2 enabled in Zone 1 enabled in Zone 0 enabled

(Default) (Default) (Default)

Table 12. Bank A Configuration (0x1A, Bits[1:0])

Bit 1 Bit 0

Control Bank A Mapping Mode BREGA/ALSM1 Control

0 = Exponential Mapping (Default) 0 = Control Bank A is configured for Brightness Register Current

Control (Default)

1 = Linear Mapping 1 = Control Bank A is configured for ALS current control via the

ALSM1 Zone Target Registers

SLOA172B–June 2012–Revised April 2013 AN-2250 LM3533 Evaluation Kit

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