Datasheet
LM150, LM350-N, LM350A
SNVS772B –MAY 1998–REVISED MARCH 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)(3)
Power Dissipation Internally Limited
Input-Output Voltage Differential +35V
Storage Temperature −65°C to +150°C
Metal Package (Soldering, 10 sec.) 300°C
Lead Temperature
Plastic Package (Soldering, 4 sec.) 260°C
ESD Tolerance TBD
LM150 −55°C ≤ T
J
≤ +150°C
Operating Temperature Range LM350A −40°C ≤ T
J
≤ +125°C
LM350 0°C ≤ T
J
≤ +125°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics.
(2) Refer to RETS150K drawing for military specifications of the LM150K.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Electrical Characteristics
Specifications with standard type face are for T
J
= 25°C, and those with boldface type apply over full Operating
Temperature Range. Unless otherwise specified, V
IN
− V
OUT
= 5V, and I
OUT
= 10 mA
(1)
Parameter Conditions LM150
Units
Min Typ Max
Reference Voltage 3V ≤ (V
IN
− V
OUT
) ≤ 35V, 10 mA ≤ I
OUT
≤ 3A, P ≤ 30W 1.20 1.25 1.30 V
0.005 0.01 %/V
Line Regulation 3V ≤ (V
IN
− V
OUT
) ≤ 35V
(2)
0.02 0.05 %/V
0.1 0.3 %
Load Regulation 10 mA ≤ I
OUT
≤ 3A
(2)
0.3 1 %
Thermal Regulation 20 ms Pulse 0.002 0.01 %/W
Adjustment Pin Current 50 100 μA
Adjustment Pin Current Change 10 mA ≤ I
OUT
≤ 3A, 3V ≤ (V
IN
− V
OUT
) ≤ 35V 0.2 5 μA
Temperature Stability T
MIN
≤ T
J
≤ T
MAX
1 %
Minimum Load Current V
IN
− V
OUT
= 35V 3.5 5 mA
V
IN
− V
OUT
≤ 10V 3.0 4.5 A
Current Limit
V
IN
− V
OUT
= 30V 0.3 1 A
RMS Output Noise, % of V
OUT
10 Hz ≤ f ≤ 10 kHz 0.001 %
V
OUT
= 10V, f = 120 Hz, C
ADJ
= 0 μF 65 dB
Ripple Rejection Ratio
V
OUT
= 10V, f = 120 Hz, C
ADJ
= 10 μF 66 86 dB
Long-Term Stability T
J
= 125°C, 1000 hrs 0.3 1 %
Thermal Resistance, Junction to Case NDS Package 1.2 1.5 °C/W
Thermal Resistance, Junction to
NDS Package 35 °C/W
Ambient (No Heat Sink)
(1) These specifications are applicable for power dissipations up to 30W for the TO-3 (NDS) package and 25W for the TO-220 (NDE)
package. Power dissipation is ensured at these values up to 15V input-output differential. Above 15V differential, power dissipation will
be limited by internal protection circuitry. All limits (i.e., the numbers in the Min. and Max. columns) are ensured to AOQL (Average
Outgoing Quality Level).
(2) Regulation is measured at a constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to
heating effects are covered under the specifications for thermal regulation.
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