Datasheet
Z
P
=
1
R
O
x C
O
+
m
C
- 0.5
L x C
O
x f
SW
Z
Z
=
1
R
C
x C
O
S
n
=
V
IN
x G
I
x R
S
L1
S
e
=
(
V
IN
16
+ 0.125
x f
SW
)
A
PS
=
1 +
(R
O
+ R
L
) x (m
C
± 0.5)
L1 x f
SW
R
O
G
I
x R
S
x
1
G
PS
= A
PS
x
1 +
s
Z
P
1 +
s
Z
Z
(
)
1 +
s
Z
L
(
)
+
-
+
+
-
V
RAMP
L
R
L
C
O
R
O
R
C
+
-
0.6V
+
-
R
FB2
R
FB1
G
M
V
O
V
C
C
1
C
2
R
1
V
IN
LM3495
www.ti.com
SNVS410F –FEBRUARY 2006–REVISED APRIL 2013
Figure 36. Power Stage and Error Amp
One popular method for selecting the compensation components is to create Bode plots of gain and phase for
the power stage and error amplifier. Combined, they make the overall bandwidth and phase margin of the
regulator easy to determine. Software tools such as Excel, MathCAD, and Matlab are useful for observing how
changes in compensation or the power stage affect system gain and phase.
The power stage in an emulated peak current mode buck converter consists of the DC gain, A
PS
, a low
frequency pole, f
P
, the ESR zero, f
Z
, and a higher frequency pole, f
L
, set by the ratio of the sensed current ramp
to the emulated current ramp. The power stage transfer function (also called the Control-to-Output transfer
function) can be written:
(23)
Where the DC gain is defined as:
where
• R
S
= R
DSON-LO
+ R
SNS
• m
C
= S
e
/ S
n
• G
I
= 4 (24)
(25)
(26)
(27)
The low frequency pole is:
(28)
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