Datasheet

R
ILIM
=
20 PA
I
CL
x R
SNS
LG
SW/CSH
HG
ILIM
LM3495
L1
Q1
Q2
CSL
R
ILIM
R
SNS
V
IN
LM3495
SNVS410F –FEBRUARY 2006–REVISED APRIL 2013 www.ti.com
Figure 35. Current Limit Sense Resistor
When using a dedicated current limit sensing resistor, the equation governing the low-side current limit becomes:
(6)
MAXIMUM CURRENT SENSE
In order to keep the low-side current sense amplifier within its linear range, the peak sense voltage, V
SNS
,
between the CSL and SW/CSH pins should remain below 200 mV.
V
SNS
= I
PK
x (R
DSON-LO
+ R
SNS
) (7)
The value I
PK
can be determined by following the equations in the Output Inductor.
HIGH-SIDE CURRENT LIMIT
The LM3495 employs a second comparator that monitors the voltage across the high-side FET when it is on.
This provides protection against a short circuit at the switch node, which the low-side current limit cannot detect.
If the drain-to-source voltage of the high-side FET exceeds 500 mV while the FET is on, the LM3495 will
immediately enter hiccup mode. A 200 ns blanking period after the high-side FET turns on is used to prevent
switching transient voltages from tripping the high-side current limit without cause.
HICCUP MODE
During hiccup mode, the LM3495 disables both the high-side and low-side FETs and begins a cool down period
of 4096 switching cycles. At the conclusion of this cool down period, the regulator performs an internal 400 cycle
soft start identical to the soft start at turn-on. During soft start only the high-side current limit can put the LM3495
into hiccup mode. low-side current cannot put the LM3495 into hiccup mode during soft start, although it can limit
duty cycle. If a short at the output persists when soft start is done, the part will begin counting high-side pulses
skipped due to the low-side current limit and will re-enter hiccup mode 16 cycles later. The long term effect
observed will be 4096 cycles with the power FETs disabled, and then 416 (400 + 16) cycles where they are
enabled.
The hiccup protection mode is designed to protect the external components of the circuit (output inductor, FETs
and input voltage source) from thermal stress. For example, assume that the low–side current limit is10A. Once
in hiccup mode the effective duty cycle for the high-side FET and output inductor will be D*(416/4096). For the
low-side FET it will be (1-D)(416/4096). This means that even under the worst case conditions (minimum
switching frequency and maximum duty cycle, D
MAX
= 96%), the average current through the inductor and high-
side FET will be 975 mA and the average current seen by the low-side FET will be 40 mA.
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