Datasheet

R
1
V
IN (UVLO,rising)
= 1.225V x
R
2
+1
¹
·
©
§
V
IN(HYS)
=
I
HYS
R
1
UVLO Threshold and Hysteresis www.ti.com
Figure 1. LM34927 Evaluation Board (Top View)
2 UVLO Threshold and Hysteresis
The UVLO resistors are selected using the following two equations:
(1)
and
(2)
On this evaluation board R1 = 127 kΩ and R2 = 8.25 kΩ, resulting in UVLO rising threshold at VIN = 20.5
V and a hysteresis of 2.54 V.
3 Board Connection And Start-Up
The input connections are made using TP1 (VIN) and TP2 (GND) terminals. The primary output appears
at TP3 (VOUT1) and TP4 (GND). The secondary (isolated) output is available across TP5 (VOUT2) and
TP6 (IGND). The input voltage should be gradually increased above UVLO set point of 20.5 V. Both the
outputs (VOUT1 and VOUT2) should be close to 10 V at this point. This board is designed to function with
input voltage range of 20 V to 100 V. The minimum VIN threshold can be changed by changing the UVLO
resistors R1, R2. VIN should not exceed 100 V.
2
AN-2202 LM34927 Integrated Secondary Side Bias Regulator for Isolated SNVA633A–March 2012–Revised April 2013
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