Datasheet

Cff =
t
ON (max)
x 3
(R1//R2)
FB
SW
LM34919C
BST
VCC
D1
ISEN
RON/SD
VIN
6V - 24V
Input
SS
RTN
SGND
V
OUT
3.3V
C1
2.2 PF
SHUTDOWN
C6
0.022 PF
C5
0.1 PF
R
ON
28 k:
C3
0.1 PF
C4
0.022 PF
L1
8.2 PH
R3
0.27:
C2
22 PF
R1
787:
R2
2.49 k:
LM34919B
LM34919B-Q1
SNVS623A –MAY 2010–REVISED FEBRUARY 2013 www.ti.com
Figure 29. Example Circuit
Figure 30. Efficiency (Circuit of Figure 29) Figure 31. Frequency vs. V
IN
(Circuit of Figure 29)
LOW OUTPUT RIPPLE CONFIGURATIONS
For applications where lower ripple at V
OUT
is required, the following options can be used to reduce or nearly
eliminate the ripple.
a) Reduced ripple configuration: In Figure 32, Cff is added across R1 to AC-couple the ripple at V
OUT
directly
to the FB pin. This allows the ripple at V
OUT
to be reduced to a minimum of 25 mVpp by reducing R3, since the
ripple at V
OUT
is not attenuated by the feedback resistors. The minimum value for Cff is determined from:
(17)
where t
ON(max)
is the maximum on-time, which occurs at V
IN(min)
. The next larger standard value capacitor should
be used for Cff. R1 and R2 should each be towards the upper end of the 2 kΩ to 10 kΩ range.
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