Datasheet

C6 =
t
2
x 12.5 PA
2.5V
C1 =
I
OUT (max)
x t
ON
'V
LM34914
www.ti.com SNVS453B –MAY 2006–REVISED MARCH 2013
D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may inadvertently affect the IC’s operation through external or internal EMI. The diode
should be rated for the maximum input voltage (V
IN(max)
), the maximum load current (I
OUT(max)
), and the peak
current which occurs when the current limit and maximum ripple current are reached simultaneously. The diode’s
average power dissipation is calculated from:
P
D1
= V
F
x I
OUT
x (1-D) (13)
where V
F
is the diode's forward voltage drop, and D is the duty cycle.
C1 and C5: C1’s purpose is to supply most of the switch current during the on-time, and limit the voltage ripple
at VIN, on the assumption that the voltage source feeding VIN has an output impedance greater than zero. If the
source’s dynamic impedance is high (effectively a current source), it supplies the average input current, but not
the ripple current.
At maximum load current, when the buck switch turns on, the current into V
IN
suddenly increases to the lower
peak of the inductor’s ripple current, ramps up to the upper peak, then drop to zero at turn-off. The average
current during the on-time is the load current. For a worst case calculation, C1 must supply this average load
current during the maximum on-time. C1 is calculated from:
(14)
where t
ON
is the maximum on-time, and ΔV is the allowable ripple voltage at V
IN
. C5’s purpose is to help avoid
transients and ringing due to long lead inductance leading to the VIN pin. A low ESR, 0.1 µF ceramic chip
capacitor is recommended, and must be located close to the VIN and RTN pins.
C3: The capacitor at the V
CC
output provides not only noise filtering and stability, but also prevents false
triggering of the V
CC
UVLO at the buck switch on/off transitions. C3 should be no smaller than 0.1 µF, and should
be a good quality, low ESR, ceramic capacitor. C3’s value, and the V
CC
current limit, determine a portion of the
turn-on-time (t1 in Figure 8).
C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended
as C4 supplies a surge current to charge the buck switch gate at turn-on. A low ESR also helps ensure a
complete recharge during each off-time.
C6: The capacitor at the SS pin determines the softstart time, i.e. the time for the output voltage, to reach its final
value (t2 in Figure 8). The capacitor value is determined from the following:
(15)
PC BOARD LAYOUT
The LM34914 regulation, over-voltage, and current limit comparators are very fast, and respond to short duration
noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be as neat
and compact as possible, and all of the components must be as close as possible to their associated pins. The
current loop formed by D1, L1, C2 and the SGND and ISEN pins should be as small as possible. The ground
connection from SGND and RTN to C1 should be as short and direct as possible.
If it is expected that the internal dissipation of the LM34914 will produce excessive junction temperatures during
normal operation, good use of the PC board’s ground plane can help to dissipate heat. The exposed pad on the
bottom of the IC package can be soldered to a ground plane, and that plane should extend out from beneath the
IC, and be connected to ground plane on the board’s other side with several vias, to help dissipate the heat. The
exposed pad is internally connected to the IC substrate. Additionally the use of wide PC board traces, where
possible, can help conduct heat away from the IC. Judicious positioning of the PC board within the end product,
along with the use of any available air flow (forced or natural convection) can help reduce the junction
temperatures.
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