Datasheet

R7 =
§
¨
©
§
¨
©
-1
V
EN
1.43V
x
R8
R8 =
§
¨
©
§
¨
©
1 +
1.43V ± V
SH
V
EN
± 1.43V
I
UVLO
x
1.43V
FA/SYNC/SD
40 k:
DR
30 Ps
LM3481
FA/SYNC/SD
>1.3V
10 k:
R
FA
MOSFET State
On-Normal Operation
OFF- Shutdown
LM3481
FA/SYNC/SD
Freq. clock
100 kHz to 1 MHz
R
FA
LM3481
LM3481
www.ti.com SNVS346E –NOVEMBER 2007–REVISED APRIL 2012
Figure 25. Frequency Synchronization
Figure 26. Shutdown Operation in Frequency Adjust Mode
Figure 27. Shutdown Operation in Synchronization Mode
UNDER VOLTAGE LOCKOUT (UVLO) Pin
The UVLO pin provides user programmable enable and shutdown thresholds. The UVLO pin is compared to an
internal reference of 1.43V (typical), and a resistor divider programs the enable threshold, V
EN
. When the IC is
enabled, a 5 μA current is sourced out of the UVLO pin, which effectively causes a hysteresis, and the UVLO
shutdown threshold, V
SH
, is now lower than the enable threshold. Setting these thresholds requires two resistors
connected from the V
IN
pin to the UVLO pin and from the UVLO pin to GND (see Figure 28). Select the desired
enable, V
EN
, and UVLO shutdown, V
SH
, threshold voltages and use the following equations to determine the
resistance values:
Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM3481