Datasheet
-
+
PMOS_drv
Hyst Comp
FB
+
V
OUT
PGATE
+
-
Reference
Voltage
V
FB
= 0.8V
V
HYST
= 21 mV
PGATE
R1
R2
L
C
ff
C
OUT
V
OUT
=
R
1
+
R
2
R
2
x V
FB
LM3475
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SNVS239B –OCTOBER 2004–REVISED MARCH 2013
At very low or very high duty cycle operation, maximum frequency will be limited by the blanking time. The
maximum operating frequency can be determined by the following equations:
F
MAX
= D / ton
min
(1)
F
MAX
= (1-D) / toff
min
where
• D is the duty cycle, defined as V
OUT
/V
IN
, and ton
min
• toff
min
is the sum of the blanking time, the propagation delay time, and the PFET delay time (see Figure 12) (2)
ENABLE PIN (EN)
The LM3475 provides a shutdown function via the EN pin to disable the device. The device is active when the
EN pin is pulled above 1.5V (typ) and in shutdown mode when EN is below 1.135V (typ). In shutdown mode,
total quiescent current is less than 10µA. The EN pin can be directly connected to V
IN
for always-on operation.
Design Information
SETTING OUTPUT VOLTAGE
The output voltage is programmed using a resistor divider between V
OUT
and GND as shown in Figure 13. The
feedback resistors can be calculated as follows:
where
• Vfb is 0.8V typically (3)
The feedback resistor ratio, α = (R1+R2) / R2, will also be used below to calculate output ripple and operating
frequency.
Figure 13. Hysteretic Window
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