Datasheet

LM3464, LM3464A
SNVS652F APRIL 2010REVISED MAY 2013
www.ti.com
Connection Diagram
Figure 1. Top View
28-Lead TSSOP-28
Package Number PWP
PIN DESCRIPTIONS
Pin Name Description Application Information
1 SYNC Synchronization signal output for Connect this pin to the DIM pin of other LM3464/64A to enable cascade
cascade operation operation (multiple device). This pin should leave open for single device
(Master-Slave configuration) operation.
2 DIM PWM dimming control Apply logic level PWM signal to this pin controls the average brightness of the
LED string. (<1.25V disable output).
3 Thermal Thermal sensor input Connect thermal sensor to this pin with bias accordingly to facilitate thermal
foldback and control the brightness of the LED array.
4 Thermal_Cap Thermal dimming ramp capacitor Connect a capacitor across this pin and GND to define the thermal dimming
frequency.
5 VDHC Head room control Apply external voltage across this pin and ground to define the minimum drain
voltage. This pin is internal biased at 0.9V.
6 DMIN Minimum thermal dimming duty The voltage across this pin and GND defines the minimum thermal dimming
control duty cycle.
7 Faultb Fault signal output Open Drain output, pull-down when FAULT condition occurred.
8 AGND Signal ground Analog ground connection for internal circuitry. Must be connected to PGND
external to the package.
9 FAULT_CAP Fault delay capacitor Connect to an external capacitor to program the fault response time.
10 CDHC DHC time constant capacitor An external capacitor to ground programs the Dynamic Headroom Control loop
response time
11 OutP DHC Output Connect this pin to the voltage feedback input of primary power supply to
facilitate dynamic headroom control.
12 VLedFB Output voltage sense input This pin senses the output voltage of the primary power supply.
13 VCC Internal regulator output This pin is the output terminal of the internal voltage regulator and should be
bypassed by a high quality 1uF ceramic capacitor.
14 EN Enable input This pin serves as device enable input when logic level signal is applied. (Active
high with internal pull-up)
15 VIN Supply voltage The input voltage should be in the range of 12V to 80V for LM3464, 12–95V for
LM3464A
16 DR4 Channel 4 drain sense input This pin senses the drain voltage of the external MOSFET of channel 4 to
facilitate DHC operation and fault detection.
17 DR3 Channel 3 drain sense input This pin senses the drain voltage of the external MOSFET of channel 3 to
facilitate DHC operation and fault detection.
18 DR2 Channel 2 drain sense input This pin senses the drain voltage of the external MOSFET of channel 2 to
facilitate DHC operation and fault detection.
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