Datasheet

Analog voltage
at the DIMn pin
(Skipped) 1/256
PWM
dimming duty
3/256
4/256
0
5/256
5
.
7
V
-
V
LSB
5
.
7
V
-
2
V
LSB
5
.
7
V
5
.
7
V
-
3
V
LSB
256/256
5
.
7
V
-
4
V
LSB
255/256
254/256
253/256
252/256
0.8
V+3V
LSB
0.8V+2V
LSB
0
.
8
V
+
4
V
LSB
0.8V+V
LSB
0.8V
6/256
V
LSB
=
5.7V - 0.8V
256
2/256
LM3463
www.ti.com
SNVS807A MAY 2012REVISED MAY 2013
Figure 35. Conversion characteristic of the analog voltage to PWM dimming control circuit
Using Less than Six Output Channels
If less than 6 output channels are needed, the unused output channel(s) of the LM3463 can be disabled by not
installing the external MOSFET and current sensing resistor. The drain voltage sensing pin (DRn), gate driver
output pin (GDn) and current sensing input pin (SEn) of a disabled channel must be left floating to secure proper
operation. The output channel(s) which has no external MOSFET and current sensing resistor installed is
disabled and excluded from DHC loop at system startup while the V
RAIL
reaches V
DHC_READY
.
A total of five output channels of the LM3463 can be disabled. The channel 0 must be in use regardless of the
number of disabled channel. This feature also applies in cascade operation.
Cascading of LM3463
For the applications that require more than six output channels, two or more pieces of LM3463 can be cascaded
to expand the number of output channel. Dimming control is allowed in cascade operation. The connection
diagrams for cascade operation in different modes of dimming control are as shown in Figure 36.
Serial interface mode in cascade operation
In the serial interface mode, the master LM3463 accepts external data frames through the serial data interface
which consists of the DIM01, DIM23 and DIM4 pins and passes the frames to the following slave LM3463
through its serial data output interface (SYNC and CLKOUT pins). Every slave unit shifts data in and out bit by
bit to its following slave unit.
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