Datasheet

0 1 2 3 4 5 6 7
0
20
40
60
80
100
DIMMING DUTY (%)
V
DIMn
(V)
LM3463
SNVS807A –MAY 2012–REVISED MAY 2013 www.ti.com
(15)
In order to achieve a 256 level (8–bit resolution) brightness control, the minimum on time of every channel
(1/(f
SERIAL-DIM
*256)) should be no shorter than 8 us, thus a dimming frequency of 488Hz is suggested to use.
The LM3463 samples the analog voltage at the DIMn pins and updates the dimming duty of each output channel
at a rate of 1280 system clock cycle (1280/f
CLKOUT
). In order to ensure correct conversion of analog voltage to
PWM dimming duty, the slew rate of the analog voltage for dimming control is limited the following equation:
(16)
Figure 34. Dimming Duty vs V
DIMn
in DC interface mode
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