Datasheet

GD0
SE0
Ref1
S/H
Fault
DR2
GD1
SE1
Ref1
S/H
Fault
GD2
SE2
Ref1
S/H
Fault
GD3
SE3
Ref1
S/H
Fault
GD4
SE4
Ref1
S/H
Fault
GD5
SE5
Ref1
S/H
Fault
Fault/Control Logic
High voltage Fault detection
circuitry
DR3
DR4
DR5
DR0
DR1
DHC circuitry
CDHC
OutP
Faultb
FCAP
Pre-Regulator
VIN
VCC
EN
GND
Output current
control circuitry
IOUTADJ
ISR
Ref1 VBG
ADCRef
VLedFB
MODE
DIM01
DIM23
DIM4
DIM5
Mode
Control
Input Interface
Serial IF
32 bit shift register
PCLK
C255
Load
SYNC
Mode
Control
C223
Shift Enable
Pulse Width Controller
C255
PCLK
Serial IF
LM3463
VREF
REFRTN
DRVLIM
SAR
ADC
Oscillator (ADC, duty
cycle control)
FS
5 to 1
MUX
CLKOUT
8-bit Timing
Decoder
PCLK
C223 C255
LM3463
SNVS807A –MAY 2012–REVISED MAY 2013 www.ti.com
Block Diagram
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