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DR0

GD0

OutP

REFRTN

VIN

DR1

DR5

Primary power supply

Voltage

feedback pin

Voltage output

High Power LED Arrays

RDHC

GND

RISNS1

RISNS2

RISNS6

GND GND

GD1

SE0

Faultb

RAIL

LM3463

SE1

SE5

GD5

REFRTN

RIADJ2

RIADJ1

CVCC

Vcc

VREF

IOUTADJ

GND

CFLT

CDHC

FCAP

CDHC

RFS

VCC

MODE

DIM01

DIM23

DIM4

DIM5

RFB1

RFB2

CIN

VLedFB

REFRTN

GND

Faultb

MODE

DIM01

DIM23

DIM4

DIM5

CVREF

RLMT1

DRVLIM

RLMT2

LM3463

www.ti.com

SNVS807A –MAY 2012–REVISED MAY 2013

Dynamic Headroom Controller with Thermal Control Interface and Individual Channel

Dimming Control

Check for Samples: LM3463

FEATURES

APPLICATIONS

• Dynamic Headroom Control Output to

• Streetlights

Maximize Efficiency

• Solid State Lighting Solutions

• 6 Channels Current Regulated LED Driver

DESCRIPTION

• High Precision Analog Dimming Control

The LM3463 is a six channel linear LED driver with

Interface

Dynamic Headroom Control (DHC) interface that is

• 4 Individual PWM Dimming Control Input

specialized for high power LED lighting applications.

• Dimming Control via Digital Data Bus

The variation of the output current of every output

channel in the temperature range of -40°C to 125°C

• Built-In Maximum MOSFET Power Limiting

is well controlled to less than ±1%. The output current

Mechanism

of every channel is accurately matched to each other

• Allows Cascade Operation to Extend the

with less than ± 1% difference as well.

Output Channels

By interfacing the LM3463 to the output voltage

• Fault Indicator Output

feedback node of a switching power supply via the

• Thermal Shutdown

DHC interface, the system efficiency is optimized

• UVLO With Hysteresis

automatically. The dynamic headroom control circuit

in the LM3463 minimizes power dissipation on the

• 48L WQFN Package

external MOSFETs by adjusting the output voltage of

the primary switching power supply according to the

KEY SPECIFICATIONS

changing forward voltage of the LEDs. Comprising

• Wide supply voltage range (12V-95V)

the advantages of linear and switching converters,

the LM3463 delivers accurately regulated current to

• Thermal fold-back dimming control

LEDs while maximizing the system efficiency.

• DHC regulates the lowest MOSFET drain

The dimming control interface of the LM3463 accepts

voltage to 1V

both analog and PWM dimming control signals. The

analog dimming control input controls the current of

all LEDs while the PWM control inputs control the

dimming duty of output channels individually.

Typical Application

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (41 pages)

PAGE 1
LM3463 www.ti.
PAGE 2
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com DESCRIPTION CONTINUED The LM3463 provides a sophisticated protection mechanism that secures high reliability and stability of the lighting system. The protection features include VIN Under-Voltage–Lock-Out (UVLO), thermal shut-down, LED short / open circuit protection and MOSFET drain voltage limiting. The LED short circuit protection protects both the LED and MOSFETS by limiting the power dissipation on the MOSFETS.
PAGE 3
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 PIN DESCRIPTIONS (continued) Pin 7 8 9 10 11 Name DIM01 Description Application information Multi-function input pin. The function of this pin differs depending on the selected operation mode that sets by the MODE pin. Channel 0/1 PWM dimming control Direct PWM mode: Apply a bi-level PWM signal (TTL logic high and low) to this pin to enable/disable ch0 and ch1. Apply logic high to this pin to enable channel 0 and 1.
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LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com PIN DESCRIPTIONS (continued) Pin Name Description Application information Operation mode selection input pin. Bias this pin externally to set the LM3463 in different operation mode. 18 MODE Direct PWM mode: VMODE = GND Mode select input pin Serial interface mode: VMODE = No Connection DC interface mode: VMODE = VCC 19 VCC 20 VLedFB Output terminal of the internal voltage regulator.
PAGE 5
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 PIN DESCRIPTIONS (continued) Pin Name 46 GD1 channel 1 gate drive output pin Gate driver output. Connect to the gate terminal of the external MOSFET. 47 SE0 Channel 0 LED driver sense input pin Connect to the junction of the source terminal of the external MOSFET and the sense resistor to facilitate current regulation for channel 0. 48 GD0 channel 0 gate drive output pin Gate driver output.
PAGE 6
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VIN to GND -0.3V to 100V DR0, DR1, DR2, DR3, DR4, DR5 to GND -0.3V to 100V EN -0.3V to 5.5V DRVLIM -0.3V to 6V Faultb -0.3V to 20V All other pins -0.
PAGE 7
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 Electrical Characteristics (continued) Specification with standard type are for TA = TJ = +25°C only; limits in boldface type apply over the full Operating Junction Temperature (TJ) range. Minimum and Maximum are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = +25°C, and are provided for reference purposes only.
PAGE 8
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com Electrical Characteristics (continued) Specification with standard type are for TA = TJ = +25°C only; limits in boldface type apply over the full Operating Junction Temperature (TJ) range. Minimum and Maximum are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = +25°C, and are provided for reference purposes only.
PAGE 9
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 Typical Performance Characteristics All curves taken at VIN = 48V with configuration in typical application for driving twelve power LEDs with six output channels active and 350 mA output current per channel. TA = 25°C, unless otherwise specified. VSEn vs Temperature, VIOUTADJ=VREF VSEn vs Temperature, VIOUTADJ=0.5 VREF 103.0 0.203 102.5 0.202 102.0 VSEn(mV) 101.5 VSEn(V) 0.201 101.0 0.200 0.199 VIOUTADJ= VREF 100.
PAGE 10
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) All curves taken at VIN = 48V with configuration in typical application for driving twelve power LEDs with six output channels active and 350 mA output current per channel. TA = 25°C, unless otherwise specified. VSEn vs VIOUTADJ, TA=125°C VSEn vs VIOUTADJ (VIOUTADJ < 60 mV), TA=125°C 0.200 12 0.175 0.150 TA=125°C 10 TA=125°C VSEn(V) VSEn(mV) 0.125 0.100 0.
PAGE 11
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 Typical Performance Characteristics (continued) All curves taken at VIN = 48V with configuration in typical application for driving twelve power LEDs with six output channels active and 350 mA output current per channel. TA = 25°C, unless otherwise specified. VREF vs Temperature 2.55 3.45 2.54 3.40 2.53 3.35 2.52 VREF(V) VOutP-MAX(V) VOutP-MAX vs Temperature 3.50 3.30 3.25 3.20 2.51 2.50 2.50 3.15 2.48 3.10 2.48 3.05 2.46 3.00 2.
PAGE 12
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.
PAGE 13
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 Overview The LM3463 is a six channel linear current regulator which designed for LED lighting applications. The use of the Dynamic Headroom Control (DHC) method secures high system power efficiency and prolongs system operation lifetime by minimizing the power stress on critical components. The output currents of the LM3463 driver stage are regulated by six individual low-side current regulators.
PAGE 14
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com The above equations apply when VIOUTADJ is equal to or below VREF (2.5V). Generally the VIOUTADJ should not be set higher than VREF. Applying a voltage high than VREF to the IOUTADJ pin could result in inaccurate LED driving currents which fall out of the specification. Figure 19 shows the relationship of VIOUTADJ and VSEn. 0.25 VSEn(V) 0.20 0.15 0.10 0.05 0.00 0 1 2 3 4 5 VIOUTADJ(V) 6 7 Figure 19.
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LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 LM3463 VREF CVREF RIADJ1 IOUTADJ RIADJ2 REFRTN GND GND Figure 21. Biasing IOUTADJ from VREF VCC Regulator The VCC regulator accepts an input voltage in the range of 12V to 95V from the VIN pin and delivers a 6.5V typical constant voltage at the VCC pin to provide power and bias voltages to the internal circuits. The VCC pin should be bypassed to ground by a low ESR capacitor across the VCC and GND pins. A 1uF 10V X7R capacitor is suggested.
PAGE 16
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com Q1 GD0 Q2 GD1 LM3463 Q6 GD5 SE5 RISNS6 VREF SE1 RIADJ1 IOUTADJ CVREF RIADJ2 GND RISNS2 SE0 RISNS1 REFRTN GND GND GND GND Figure 22. Individual connections to REFRTN REFRTN and GND The REFRTN pin is the reference point for the high precision and low noise internal circuits. The pins which referenced to the REFRTN are VREF, IOUTADJ, SE0, SE1, SE2, SE3, SE4 and SE5.
PAGE 17
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 System Clock Generator The LM3463 includes an internal clock generator which is used to provide clock signal to the internal digital circuits. The clock frequency at the CLKOUT pin is equal to 1/2 of the frequency of the internal system clock generator.
PAGE 18
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com Due to the changing of LED current, DHC adjusts the VRAIL VRAIL to maintain constant voltage headroom VRAIL(steady) DHC resumes as VRAIL maintains as the VIOUTADJ increases to above 0.63V VIOUADJ equals 0.63V 0V Time VSEn LED current changes VSEn changes with constant VRAIL following VIOUTADJ Time 0V VIOUTADJ 2.5V VRAIL remains constant when the 0.63V VIOUTADJ is equal to or below 0.63V Time Figure 23.
PAGE 19
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 VRAIL VRAIL(peak) VDHC_READY VRAIL(steady) VRAIL(nom) 0 Time Initiated by Pushed up primary power by LM3463 supply DHC activated Figure 24. Changes of VRAIL during system startup Shortening System Startup Time The system startup time can be shortened by sinking current from the ISR pin to ground through a resistor, RISR. The lower resistance the RISR carries, the shorter time the system startup takes.
PAGE 20
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com Generally, the system startup time tST is the longest when the ISR pin is left open (tST-1). The amount of the decreasing of the startup time is inversely proportional to the current being drawn from the ISR pin, thus determined by the value of the resistor, RISR. The rate of decreasing of the startup time is governed by the following equation.
PAGE 21
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 PROCEDURES REMARKS Begin design VLED-MAX-COLD, the highest forward voltage of LED strings under low temperature Identify VLED-MAX-COLD VLED-MIN-HOT, the lowest forward voltage of LED strings under high temperature Identify VLED-MIN-HOT Adjust the nominal output voltage of the primary power supply, VRAIL(nom) = VLED-MIN-HOT - 5V Set the peak output voltage of the primary power supply (at VOutP = 0.
PAGE 22
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com Primary power supply VRAIL LM3463 To control circuit of primary power supply R1 VFB RDHC OutP 2.5V RFB1 VIN VLedFB GND R2 REFRTN RFB2 GND Figure 27.
PAGE 23
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 Choosing the proper Primary Power Supply If the primary power supply is an off-the-shelf power converter, it is essential to make certain that the power converter is able to withstand the VRAIL(peak). In order to allow DHC, the nominal output voltage of the primary power supply needs to be adjusted to below VLED-MIN-HOT as well. The suggested procedures for selecting the proper power supply are as shown in Figure 28.
PAGE 24
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com Dimming Mode Control The LM3463 provides three modes of PWM dimming control. The three modes are: Direct PWM dimming mode, Serial interface mode and DC interface mode. Selection of the mode of dimming mode is made by leaving the MODE pin open or connecting the MODE pin to GND or VCC.
PAGE 25
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 Serial Interface Mode Leaving MODE pin floating enables serial interface mode. In serial interface mode, the DIM01, DIM23 and DIM4 pins are used together as a serial data interface to accept external dimming control data frames serially.
PAGE 26
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com DIM23 (Clock signal) DIM01 (Data) BIT0 BIT1 BIT2 BIT3 BIT4 BIT5 BIT6 LSB BIT7 MSB One data byte DIM23 (Clock signal) BYTE1 (Group D) DIM01 (Data) BYTE2 (Group C) BYTE3 (Group B) BYTE4 (Group A) DIM4 (End of Frame) BOF EOF One data frame Figure 31. Input waveform to the LM3463 in serial interface mode DIM23 50% 50% DIM01 tDS tDS > 10 ns tBIT tBIT > 20 ns 50% DIM4 tLATCH tLATCH > 50 ns Figure 32.
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LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 PWM dimming duty 256/256 255/256 254/256 253/256 252/256 6/256 5/256 4/256 3/256 2/256 (Skipped) 1/256 Input Data Code (Decimal) 1 2 3 4 5 25 25 25 25 25 5 4 3 2 1 0 0 Figure 33. PWM dimming duty vs code value of a data byte DC Interface Mode Connecting the MODE pin to VCC enables DC interface mode.
PAGE 28
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com (15) In order to achieve a 256 level (8–bit resolution) brightness control, the minimum on time of every channel (1/(fSERIAL-DIM*256)) should be no shorter than 8 us, thus a dimming frequency of 488Hz is suggested to use. The LM3463 samples the analog voltage at the DIMn pins and updates the dimming duty of each output channel at a rate of 1280 system clock cycle (1280/fCLKOUT).
PAGE 29
LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 PWM dimming duty 256/256 255/256 254/256 253/256 252/256 VLSB = 5.7V - 0.8V 256 6/256 5/256 4/256 3/256 2/256 (Skipped) 1/256 Analog voltage at the DIMn pin 5.7 0.8 5.7 V4V L V- SB 3 5.7 VLS V2 B 5.7 VLS B VV 5.7 LSB V V 0.8 V+ VL 0.8 V+ SB 0.8 2VL V+ SB 0.8 3VL V+ SB 4V L SB 0 Figure 35.
PAGE 30
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com DC interface mode in cascade operation In the DC interface mode, the master unit accepts four individual analog dimming control signals from external signal sources (via the DIM01, DIM23, DIM4 and DIM5 pins) and encodes the analog signals into 8-bit serial dimming control signals. The master LM3463 passes the encoded dimming control signals serially to the following slave unit through its serial data output interface (SYNC and CLKOUT pins).
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LM3463 www.ti.
PAGE 32
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com APPLICATION EXAMPLES Figure 37.
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LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 Figure 38.
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LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com Figure 39. White LEDs Only LED Module 1 White White White White White White White White White White White White VRAIL LED Module n CH0 CH1 CH2 CH3 CH4 CH5 CH0 CH1 CH2 CH3 CH4 CH5 Primary Power Supply (AC/DC Converter, Single Stage PFC, DC Voltage Regulator, etc.) Ropto Opto1 R1 COUT Ccomp Output Terminals of the Primary Power Supply LM3463 Master Unit OutP LM3463 Slave Unit OutP LM431 R2 Figure 40.
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LM3463 www.ti.com SNVS807A – MAY 2012 – REVISED MAY 2013 Figure 41. White + Red + Green LEDs for CRI Adjustment LED Module 1 White White White White Red Green White White White White Red Green VRAIL LED Module n CH0 CH1 CH2 CH3 CH4 CH5 CH0 CH1 CH2 CH3 CH4 CH5 Primary Power Supply (AC/DC Converter, Single Stage PFC, DC Voltage Regulator, etc.
PAGE 36
LM3463 SNVS807A – MAY 2012 – REVISED MAY 2013 www.ti.com REVISION HISTORY Changes from Original (May 2013) to Revision A • 36 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3463SQ/NOPB WQFN RHS 48 1000 330.0 16.4 7.3 7.3 1.3 12.0 16.0 Q1 LM3463SQX/NOPB WQFN RHS 48 2500 330.0 16.4 7.3 7.3 1.3 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3463SQ/NOPB WQFN RHS 48 1000 367.0 367.0 38.0 LM3463SQX/NOPB WQFN RHS 48 2500 367.0 367.0 38.
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MECHANICAL DATA RHS0048A SQA48A (Rev B) www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.