Datasheet

+
+
D3
C7
C9
C10
D4
D8
D9
R7
R6
R8
V
BUCK
V+
t
t
OFF
t
ON
I
L2
(t)
I
AVE
I
L2-PK
'i
L
I
L2-MIN
LM3448
SNOSB51C –SEPTEMBER 2011–REVISED MAY 2013 www.ti.com
Figure 21. Inductor Current Waveform in CCM
VCC BIAS SUPPLY
The LM3448 requires a supply voltage at the VCC pin in the range of 8V to 12V. The device has V
CC
under-
voltage lockout (UVLO) with rising and falling thresholds of 7.4V and 6.4V respectively. Methods for supplying
the V
CC
voltage are discussed in the “Design Considerations” section of this datasheet.
THERMAL SHUTDOWN
Thermal shutdown limits total power dissipation by turning off the internal SW FET when the IC junction
temperature exceeds 165°C. After thermal shutdown occurs, the SW FET will not turn on until the junction
temperature drops to approximately 145°C.
Design Considerations
VALLEY-FILL POWER FACTOR CORRECTION
For the non-isolated buck converter, a valley-fill power factor correction (PFC) circuit shown in Figure 22 provides
a simple means of improving the converter’s power factor performance.
Figure 22. Two Stage Valley Fill Circuit
The valley-fill circuit allows the buck regulator to draw power throughout a larger portion of the AC line. This
allows the capacitance needed at V
BUCK
to be lower than if there were no valley-fill circuit and adds passive
power factor correction (PFC) to the application. Besides better power factor correction, a valley-fill circuit allows
the buck converter to operate while separate circuitry translates the dimming information. This allows for dimming
that isn’t subject to 120Hz flicker that can possibly be perceived by the human eye.
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