Datasheet

V+

VLED+

VLED±

C12

SGND

TVS

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Design Guide

A clamp circuit is necessary to prevent damage to SW FET from excessive voltage. This evaluation board

uses a transient voltage suppression (TVS) clamp D1, shown in Figure 29.

Figure 29. TVS Diode Clamp

When the LM3448’s internal SW FET is on and the drain voltage is low, the blocking diode (D3) is reverse

biased and the clamp is inactive. When the SW FET is turned off, the drain voltage rises past the nominal

voltage (reflected voltage plus the input voltage). If it reaches the TVS clamp voltage plus the input

voltage, the clamp prevents any further rise. The TVS diode (D1) voltage is set to prevent the SW FET

from exceeding its maximum rating and should be greater than the "output voltage x turns ratio" but less

than the expected amount of ringing,

(27)

This clamp method is fairly efficient and very simple compared to other commonly used methods. Note

that if the ringing is large enough that the clamp activates, the ringing energy is radiated at higher

frequencies. Depending on PCB layout, EMI filtering method, and other application specific items, the

clamp can present problems with regards to meeting radiated EMI standards. If the TVS clamp becomes

problematic, there are many other clamp options easily found in a basic literature search.

SNOA555C–April 2011–Revised May 2013 AN-2091 LM3448 - 230VAC, 6W Isolated Flyback LED Driver

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