Datasheet

LM3434

SNVS619B –MARCH 2010–REVISED MAY 2013

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PWM DIM OPERATION

The DIM pin of the LM3434 is designed so that it may be controlled using a 1.6V or higher logic signal. The

PWM frequency easily accomodates more than 40kHz dimming and can be much faster if needed. If the PWM

DIM pin is not used, tie it to CGND or leave it open. The DIM pin is tied to CGND internally through a 100k pull

down resistor.

LAYOUT CONSIDERATIONS

The LM3434 is a high performance current driver so attention to layout details is critical to obtain maximum

performance. The most important PCB board design consideration is minimizing the loop comprised by the main

FET, synchronous FET, and their associated decoupling capacitor(s). Place the V

bypass capacitor as near as

possible to the LM3434. Place the PWM dimming/shunt FET as close to the LED as possible. A ground plane

should be used for power distribution to the power FETs. Use a star ground between the LM3434 circuitry, the

synchronous FET, and the decoupling capacitor(s). The EP contact on the underside of the package must be

connected to V

. The two lines connecting the sense resistor to CSN and CSP must be routed as a differential

pair directly from the resistor. A Kelvin connection is recommended. It is good practice to route the DIMO/DIMR,

HS/HO, and LO/LS lines as differential pairs. The most important PCB board design consideration is minimizing

the loop comprised by the main FET, synchronous FET, and their associated decoupling capacitor(s). Optimally

this loop should be orthogonal to the ground plane.

Product Folder Links: LM3434