Datasheet

L =
0.3 x R
ON
x C
ON
I
RIPPLE
LM3434
www.ti.com SNVS619B –MARCH 2010–REVISED MAY 2013
INDUCTOR SELECTION
The most critical inductor parameters are inductance, current rating, and DC resistance. To calculate the
inductance, use the desired peak to peak LED ripple current (I
RIPPLE
), R
ON
, and C
ON
. A reasonable value for
I
RIPPLE
is 10% of I
LED
. The inductor value is calculated using the following equation:
(8)
For all V
LED
and V
EE
voltages, I
RIPPLE
remains constant and is only dependent on the passive external
components R
ON
, C
ON
, and L.
The I
2
R loss caused by the DC resistance of the inductor is an important parameter affecting the efficiency.
Lower DC resistance inductors are larger. A good tradeoff point between the efficiency and the core size is
letting the inductor I
2
R loss equal 1% to 2% of the output power. The inductor should have a current rating
greater than the peak current for the application. The peak current is I
LED
plus 1/2 I
RIPPLE
.
POWER FET SELECTION
FETs should be chosen so that the I
2
R
DSON
loss is less than 1% of the total output power. Analysis shows best
efficiency with around 8mΩ of R
DSON
and 15nC of gate charge for a 6A application. All of the switching loss is in
the main switch FET. An additional important parameter for the synchronous FET is reverse recovery charge
(Q
RR
). High Q
RR
adversely affects the transient voltages seen by the IC. A low Q
RR
FET should be used.
DIM FET SELECTION
Choose a DIM FET with the lowest R
DSON
for maximum efficieny and low input current draw during the DIM
cycle. The output voltage during DIM will determine the switching frequency. A lower output voltage results in a
lower switching frequency. If the lower frequency during DIM must be bound, choose a FET with a higher R
DSON
to force the switching frequency higher during the DIM cycle.
Placement of the Parallel Dimming FET
When using a FET in parallel with the LED for PWM dimming special consideration must be used for the location
of the FET. The ideal placement of the FET is directly next to the LED. Any distance between this FET and the
LED results in line inductance. Fast current changes through this inductance can induce large voltage spikes due
to v = Ldi/dt. These can be mitigated by either reducing the distance between the FET and the LED and/or
slowing the PWM edges, and therefore the dt, by using some gate resistance on the FET. In cases where the
dimming FET is not placed close to the LED and/or very fast switching edges are desired the induced voltages
can become great enough to damage the dimming FET and/or the LM3434 HS pin. This can also result in a
large spike of current into the LED when the FET is turned off. In these cases a snubber should be placed across
the dimming FET to protect the device(s).
BOOTSTRAP CAPACITORS
The LM3434 uses two bootstrap capacitors and a bypass capacitor on V
CC
to generate the voltages needed to
drive the external FETs. A 2.2µF ceramic capacitor or larger is recommended between the V
CC
and LS pins. A
0.47µF is recommended between the HS and BST pins. A 0.1µF is recommended between BST2 and CGND.
SOFT-START CAPACITOR
The LM3434 integrates circuitry that, when used in conjunction with the SS pin, will slow the current ramp on
start-up. The SS pin is used to tailor the soft-start for a specific application. A capacitor value of 0.1µF on the SS
pin will yield a 12mS soft start time. For most applications soft start is not needed.
ENABLE OPERATION
The EN pin of the LM3434 is designed so that it may be controlled using a 1.6V or higher logic signal. If the
enable function is not used, the EN pin may be tied to V
IN
or left open. This pin is pulled to V
IN
internally through
a 100k pull up resistor.
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