Datasheet
I
NDRV
=
I
LED
E
R7 = R8 x
2.5V - REFIN
REFIN
R
SNS
=
REFIN
I
LED
+ I
NDRV
LM3431
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SNVS547G –NOVEMBER 2007–REVISED MAY 2013
To ensure this equation is valid, and that C
C2
can be used without negatively impacting the effects of R
C
and C
C
,
f
pc2
must be at least 10 times greater than f
zc
.
LED CURRENT REGULATOR
Setting LED Current
LED current is independently regulated in each of 3 strings by regulating the voltage at the SNS pins. Each SNS
pin is connected to a sense resistor, shown in the typical application schematic as R10 - R13. The sense resistor
value is calculated as follows:
Where
• I
LED
is the current in each LED string
• REF
IN
is the regulated voltage at the REFIN pin
• INDRV is the NPN base drive current (27)
If using NFETs, INDRV can be ignored. A minimum REFIN voltage of 100 mV is required, and 200mV to 300mV
is recommended for most applications. The REFIN voltage is set with a resistor divider connected to the REF
pin, shown as R7 and R8 in the typical application schematic. The resistor values are calculated as follows:
(28)
The sum of R7 and R8 should be approximately 100k to avoid excessive loading on the REF pin.
NDRV
The NDRV pins drive the base of the external NPN or N-channel MOSFET current regulators. Each pin is
capable of driving up to 15 mA of base current typically. Therefore, NPN devices with sufficient gain must be
selected. The required NDRV current can be calculated from the following equation, where β is the NPN
transistor gain.
(29)
If NFETs are used, the NDRV current can be ignored. NPN transistors should be selected based on speed and
power handling capability. A fast NPN with short rise time will give the best dimming response. However, if the
rise time is too fast, some ringing may occur in the LED current. This ringing can be improved with a resistor in
series with the NDRV pins. The NPNs must be able to handle a power equal to I
LED
x NPN voltage. Note that the
NPN voltage can be as high as approximately 5.5V in a fault condition. The NDRV pins have a limited slew rate
capability which can increase the turn-on delay time when driving NFETs. This delay increases the minimum
dimming on-time and can affect the dimming linearity at high dimming frequencies. Low V
GS
threshold NFETs are
recommended to ensure that they will turn fully on within the required time. At dimming frequencies above 10
kHz, NPN transistors are recommended for the best performance.
CFB and SC Diodes
The bottom of each LED string is connected to the CFB and SC pins through diodes as shown in Figure 14. The
CFB pin receives voltage feedback from the lowest cathode voltage. The other string cathode voltages will vary
above the regulated CFB voltage. The actual cathode voltage on these strings will depend on the LED forward
voltages. This ensures that the lowest cathode voltage (highest Vf) will be regulated with enough headroom for
the NPN regulator. The SC pin monitors for LED fault conditions and limits the maximum cathode voltage (See
LED Protection section). In this way, each LED string’s cathode is maintained within a window between minimum
headroom and fault condition.
Both the CFB and SC diodes must be rated to at least 100 µA, and the CFB diode should have a reverse voltage
rating higher than V
OUT
. With these requirements in mind, it is best to use the smallest possible case size in
order to minimize diode capacitance which can slow the LED current rise and fall times.
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