Datasheet

V
IN
nDIM
TGAIN
TSENSE
CSH
RT
GATE
1
COMP
HSN
DAP
SLOPE
2
3
4
5
6
7
20
19
18
17
16
15
14
DDRV
GND
HSP
V
CC
21
8
9
10
13
12
11
OVP
V
S
IS
TREF
SS
EN
LM3424
www.ti.com SNVS603B –AUGUST 2009–REVISED OCTOBER 2009
Connection Diagram
Figure 2. 20-Lead HTSSOP EP
PIN DESCRIPTIONS
Pin Name Description Application Information
Bypass with 100 nF capacitor to GND
1 V
IN
Input Voltage
as close to the device as possible.
Connect to > 2.4V to enable the
2 EN Enable device or to < 0.8V for low power
shutdown.
Connect a capacitor to GND to
3 COMP Compensation
compensate control loop.
Connect a resistor to GND to set the
signal current. Can also be used to
4 CSH Current Sense High analog dim as explained in the
THERMAL FOLDBACK / ANALOG
DIMMING section.
Connect a resistor to GND to set the
switching frequency. Can also be
5 RT Resistor Timing used to synchronize external clock as
explained in the SWITCHING
FREQUENCY section.
Connect a PWM signal for dimming
as detailed in the PWM DIMMING
Dimming Input /
6 nDIM section and/or a resistor divider from
Under-Voltage Protection
V
IN
to program input under-voltage
lockout.
Connect a capacitor to GND to
7 SS Soft-start
extend start-up time.
Connect a resistor to GND to set the
8 TGAIN Temp Foldback Gain
foldback slope.
Connect a resistor/ thermistor divider
from V
S
to sense the temperature as
9 TSENSE Temp Sense Input explained in the THERMAL
FOLDBACK / ANALOG DIMMING
section.
Connect a resistor divider from V
S
to
10 TREF Temp Foldback Reference
set the foldback reference voltage.
2.45V reference for temperature
11 V
S
Voltage Reference foldback circuit and other external
circuitry.
Connect a resistor divider from V
O
to
12 OVP Over-Voltage Protection
program output over-voltage lockout.
13 DDRV Dimming Gate Drive Output Connect to gate of dimming MosFET.
Connect to DAP to provide proper
14 GND Ground
system GND
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