Datasheet

R
SNS
LM3424
DDRV
100 nF
100
k:
Q2
10V
R
SNS
LED+
Q7
Q6
Q4
10V
V
IN
5 k:
LM3424
500:
DDRV
V
CC
100 pF
Q2
100 nF
10:
t
PULSE
=
2 x I
LED
x V
O
X L1
V
IN
2
LM3424
www.ti.com SNVS603B –AUGUST 2009–REVISED OCTOBER 2009
When using the PWM functionality in a boost regulator, the PWM signal drives a ground referenced FET.
However, with buck-boost and buck topologies, level shifting circuitry is necessary to translate the PWM dim
signal to the floating dimFET as shown in Figure 35 and Figure 36.
When using a series dimFET to PWM dim the LED current, more output capacitance is always better. A general
rule of thumb is to use a minimum of 40 µF when PWM dimming. For most applications, this will provide
adequate energy storage at the output when the dimFET turns off and opens the LED load. Then when the
dimFET is turned back on, the capacitance helps source current into the load, improving the LED current rise
time.
A minimum on-time must be maintained in order for PWM dimming to operate in the linear region of its transfer
function. Because the controller is disabled during dimming, the PWM pulse must be long enough such that the
energy intercepted from the input is greater than or equal to the energy being put into the LEDs. For boost and
buck-boost regulators, the minimum dimming pulse length in seconds (t
PULSE
) is:
(35)
Even maintaining a dimming pulse greater than t
PULSE
, preserving linearity at low dimming duty cycles is difficult.
Several modifications are suggested for applications requiring low dimming duty cycles. Since nDIM rising
releases the latch but does not trigger the on-time specifically, there will be an effective jitter on the rising edge of
the LED current. This jitter can be easily removed by tying the PWM input signal through the synchronization
network at the RT pin (shown in Figure 20), forcing the on-time to synchronize with the nDIM pulse.
The second helpful modification is to remove the C
FS
capacitor and R
FS
resistor, eliminating the high frequency
compensation pole. This should not affect stability, but it will speed up the response of the CSH pin, specifically
at the rising edge of the LED current when PWM dimming, thus improving the achievable linearity at low dimming
duty cycles.
Figure 35. Buck-boost Level-Shifted PWM Circuit
Figure 36. Buck Level-Shifted PWM Circuit
Design Considerations
This section describes the application level considerations when designing with the LM3424. For corresponding
calculations, refer to the Design Guide section.
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