Datasheet

cv
1.6 MHz
NMOS
SW
+
+
Control Logic
Thermal
SHDN
UVLO = 2.3V
Ramp
Artificial
Internal
Compensation
I
SENSE
V
REF
= 190 mV
I
LIMIT
Oscillator
VIN
+
-
+
-
DIM
GND
V
FB
-
+
S
R
R
Q
+
-
+
-
LM3410, LM3410Q
www.ti.com SNVS541G –OCTOBER 2007–REVISED MAY 2013
Simplified Internal Block Diagram
Figure 13. Simplified Block Diagram
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