Datasheet

nPOR
V
OUT
EN
T
POR
T
POR
85%
94%
V
PP-RMS
= V
PP-C
2
+ V
PP-ESR
2
LM3370
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SNVS406N NOVEMBER 2005REVISED MAY 2013
Voltage peak-to-peak ripple due to ESR = V
PP-ESR
= I
PP
*R
ESR
Voltage peak-to-peak ripple, root mean squared =
(11)
Note that the output ripple is dependent on the current ripple and the equivalent series resistance of the output
capacitor (R
ESR
). The R
ESR
is frequency dependent (as well as temperature dependent); make sure that the
frequency of the R
ESR
given is the same order of magnitude as the switching frequency.
Table 5. Suggested Capacitors and Their Suppliers
Model Description Case Size Vendor
4.7 µF for C
IN
C1608X5R0J475 Ceramic, X5R, 6.3V Rating 0603 TDK
C2012X5R0J475 Ceramic, X5R, 6.3V Rating 0805
JMK212BJ475 Ceramic, X5R, 6.3V Rating 0805 Taiyo Yuden
GRM21BR60J475 Ceramic, X5R, 6.3V Rating 0805
muRata
GRM219R60J- Ceramic, X5R, 6.3V Rating 0805(Thin)
475KE19D <1mm Height
10µF C
OUT
C2012X5R0J106 Ceramic, X5R, 6.3V Rating 0805 TDK
JMK212BJ106 Ceramic, X5R, 6.3V Rating 0805 Taiyo Yuden
GRM21BR60J106 Ceramic, X5R, 6.3V Rating 0805
muRata
GRM219R60J- Ceramic, X5R, 6.3V Rating 0805(Thin)
106KE19D < 1mm Height
POR (Power on Reset)
The LM3370 has an independent POR functions (nPOR) for each buck converter. The nPOR1 and nPOR2 are
open drain circuits which pull low when the outputs are below 94% (rising V
OUT
) or 85% (falling V
OUT
) of the
desire output. The inherent delay between the output (at 94% of V
OUT
) to the time at which the nPOR is enabled
is about 50 ms. A pullup resistor of 100 k at nPOR pin is required. Please refer to the electrical specification
table for other timing options. The diagram below illustrates the timing response of the POR function.
Figure 44.
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