Datasheet

7 6 5 4 3 2 1 0
Bit 6 and 7 are not used
MSB LSB
Vout for Buck 1
00101 = 1V (Min.)
11111 = 2V (Max.)
Forced PWM Mode (FPWM1)
Auto = 0 (default)
FPWM1 = 1 (PWM mode only)
7 6 5 4 3 2 1 0
Bit 6 & 7 are not used
MSB LSB
EN1 for Buck 1 (default = 1)
Bit0 = 1 to enable
Spread Spectrum (SS) Enable
Bit2 = 1 to enable
SS_fmod (SS Frequency Modulator)
ss_fmod = 1 1 kHz (default)
ss_fmod = 0 2 kHz
Pstep Enable for Buck1
Pstep = 0 (default) not enable
Pstep = 1 50 mV/step at 32 Ps/step
EN2 for Buck 2 (default = 1)
Bit1 = 1 to enable
Pstep Enable for Buck2
Pstep = 0 (default) not enable
Pstep = 1 100 mV/step at 32 Ps/step
ADR6
bit7
MSB
ADR5
bit6
ADR4
bit5
ADR3
I
2
C SLAVE address (chip address)
ADR2
bit3
ADR1
bit2
ADR0
bit1
R/W
bit0
LSB
0 1 0 0 0 0 1
bit4
LM3370
www.ti.com SNVS406N –NOVEMBER 2005–REVISED MAY 2013
I
2
C Chip Address Information
Figure 41.
Register 00
Register 01
Figure 42.
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