Datasheet

LM3243
www.ti.com SNVS782B –OCTOBER 2010–REVISED FEBRUARY 2013
FUNCTIONAL DESCRIPTION
Device Information
The LM3243 is a high-efficiency step-down DC-DC converter optimized to power the RF power amplifier (PA) in
cell phones, portable communication devices, or battery-powered RF devices with a single Li-Ion battery. It
operates in fixed-frequency PWM mode for 2G transmissions (with MODE = LOW), automatic mode transition
between PFM and PWM mode for 3G/4G RF PA operation (with MODE = HIGH), forced bypass mode (with BP
= HIGH) or in shutdown mode (with EN = LOW).
The fixed-frequency PWM mode provides high efficiency and very low output voltage ripple. In PFM mode, the
converter operates with reduced switching frequencies and lower supply current to maintain high efficiencies.
The forced bypass mode allows the user to drive the output directly from the input supply through a bypass FET.
The shutdown mode turns the LM3243 off and reduces current consumption to 0.02 µA (typ.).
In PWM and PFM modes of operation, the output voltage of the LM3243 can be dynamically programmed from
0.4V to 3.6V (typ.) by adjusting the voltage on VCON. Current overload protection and thermal overload
protection are also provided.
The LM3243 was engineered with Active Current assist and analog Bypass (ACB). This unique feature allows
the converter to support maximum load currents of 2.5A (min.) while keeping a small footprint inductor and
meeting all of the transient behaviors required for operation of a multi-mode RF Power Amplifier. The ACB circuit
provides an additional current path when the load current exceeds 1.4A (typ.) or as the switcher approaches
dropout. Similarly, the ACB circuit allows the converter to respond with faster VCON output voltage transition
times by providing extra output current on rising and falling output edges. The ACB circuit also performs the
function of analog bypass. Depending upon the input voltage, output voltage and load current, the ACB circuit
automatically and seamlessly transitions the converter into analog bypass while maintaining output voltage
regulation and low output voltage ripple. Full bypass (100% duty cycle operation) will occur if the total dropout
resistance in bypass mode (R
tot_drop
= 45 mΩ) is insufficient to regulate the output voltage.
LM3243’s 16-bump DSBGA package is the best solution for space-constrained applications such as cell phones
and other hand-held devices. The high switching frequency, 2.7 MHz (typ.) in PWM mode, reduces the size of
input capacitors, output capacitors and of the inductor. Use of a DSBGA package is best suited for opaque case
applications and requires special design considerations for implementation. (Refer to DSBGA Package Assembly
and Use section below). As the LM3243 does not implement UVLO, the system controller should set EN = LOW
during power-up and UVLO conditions. (Refer to Shutdown Mode below).
PWM Operation
When the LM3243 operates in PWM (Pulse Width Modulation) mode, the switching frequency is constant, and
the switcher regulates the output voltage by changing the energy-per-cycle to support the load required. During
the first portion of each switching cycle, the control block in the LM3243 turns on the internal PFET switch. This
allows current to flow from the input through the inductor and to the output filter capacitor and load. The inductor
limits the current to a ramp with a slope of (V
IN
– V
OUT
)/L, by storing energy in its magnetic field.
During the second portion of each cycle, the control block turns the PFET switch off, blocking current flow from
the input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the
NFET and to the output filter capacitor and load, which ramps the inductor current down with a slope of -V
OUT
/L.
The output filter capacitor stores charge when the inductor current is greater than the load current and releases it
when the inductor current is less than the load current, smoothing the voltage across the load.
At the next rising edge of the clock, the cycle repeats. An increase of load pulls the output voltage down,
increasing the error signal. As the error signal increases, the peak inductor current becomes higher, thus
increasing the average inductor current. The output voltage is therefore regulated by modulating the PFET switch
on-time to control the average current sent to the load. The circuit generates a duty-cycle modulated rectangular
signal that is averaged using a low pass filter formed by the inductor and output capacitor. The output voltage is
equal to the average of the duty-cycle modulated rectangular signal.
Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: LM3243