Datasheet

4321
Top View
4 3 2 1
Bottom View
A
B
C
D
A
B
C
D
ACB
ACB
BGND
FB
ACB
ACB
BGND
FB
PVIN
PVIN
BP
MODE
PVIN
PVIN
BP
MODE
SW
SW
EN
VCON
SW
SW
EN
VCON
PGND
PGND
SGND
VDD
PGND
PGND
SGND
VDD
www.ti.com
Connection Diagram
4 Connection Diagram
Figure 2. Connection Diagram
5 Pin Descriptions
Pin # Name Description
A1
PGND Power Ground for Buck Regulator.
B1
C1 SGND Signal Analog and Control Ground (Low Current).
D1 VDD Analog Supply Input.
A2 Switching Node connection to the internal PFET switch and NFET synchronous
rectifier.
SW
Connect to an inductor with a saturation current rating that exceeds the I
LIM,PFET,Steady
B2
State
Current Limit specification of the LM3243.
Enable Input. Set this digital input high for normal operation. For shutdown, set low.
C2 EN
Pin has an 800 k internal pull down resistor.
D2 VCON Voltage Control Analog input. V
OUT
= 2.5 * VCON
A3
PVIN Power Supply Voltage Input to the internal PFET switch.
B3
Bypass mode Input. Set the pin high for forced bypass mode operation. Set the pin
C3 BP
low for automatic Analog Current Bypass mode (recommended).
PWM/PFM Mode Selection Input. Setting the pin high allows for PFM or PWM
D3 MODE depending on the output current and output voltage (2.7 MHz PWM switching). Setting
the pin low forces the part to be in PWM only (2.7 MHz Switching).
A4
ACB Analog Current Bypass. Connect to the output at the output filter capacitor.
B4
C4 BGND Analog Current Bypass Ground (High Current).
D4 FB Feedback Analog Input. Connect to the output at the output filter capacitor.
3
SNOI158APJanuary 2011Revised MARCH 2013 AN-2105 LM3243 DSBGA Evaluation Board
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated